Sticky Notes

From PEL Wiki

Some things I want to be able to run through when I finish papers, formulate thoughts, etc. to make sure I don't miss something I've already thought of.

• Why does filling memory make the machine so much slower than filling the file cache?
  • With Tonga's model checker, using files instead of memory makes the machine much more responsive.
• If files were as cheap as memory, would you use files instead of malloc? when? Dynamically sized arrays etc.? Ability to append.
  • Does that give C Bounds checking?
• Persistent ranges that are configureable at boot time?
• DDR2 1Gb from Samsung 15 ns x 3 = 45 ns
• System Performance Equation
• DDR and DDR2 Latencies And Timings - XBITLABS.com
• page tables
• Elegant Kludge
• Processes really don't start at 0x00000000
• Statistically sample page usage using page faults and handler. (flushing the TLB randomly?)
• Pointers in a shared space. Do we deal with it?
• Use memory mountain to qualitatively show improvement in bandwidth and throughput for paged disk vs. DiskRAM
• There's no way to track usage frequency of pages for intelligent management
• The real difference is the new mapping layer!
• Page clustering? Using one entry for multiple pages - Bill Irwin and Hugh Dickins
• High memory? different definitions
• TLB flush on switches from kernel to user mode enables more kernel space
• Hard drive: 3.5 inch ATA with Ultra ATA 133 interface Capacity: Drive Speeds
• If disk is as slow as tape, do you store incremental changes Log Structured File Systems
• DIMM socket probably gets some type of physical address - What about the HyperTransport bus?
• Could you really remap the addresses in the DP AMD 64 box? It might be that you couldn't. It depends on if you have control over snooping. Otherwise, when your "memory controller" received a request for an address, it might be hard to generate the page fault on that processor to handle it.
• Multimedia buffers seem like a killer app.
• Cool chip that interfaces to raw hard drives.
• Jetfile?
• Could do the same thing with palms with flash / usb drive
• Do palm and WinCE devices use something similar for different reasons?
• Could you just modify paging with no hardware modifications? When you say you can approximate with a dual processor AMD, is it different than a single processor time sharing?
• How do you deal with multi-user access (especially over the network)? Are there special gotchas?
• Concurrently write to disk and memory for nonvolatility, but map the page as the page in memory to reduce contention.
• Dan Olsen mentioned that our large memory could simplify programming. Simplify Programming
• PC2700 = DDR333 = 5.3 GB/s
• Hunk Pointers
• Always write dirty pages to disk
• Garbage collection
• "Sorted Memory"
• "All Cache" Machine parallels
• Instead of disk use dynamically generated pages or * SAN or WAN etc.
• Modify JAVA to be simpler
• DP AMD one proc mem/disk controller
• PMC Sierra MIPS processor to be mem/disk controller
• simulate for OS development
• Let’s assume that performance kills us: it turns out that the latency is terrible because of the implementation. What if we were to only put the page tables and the swap disk on our card? Then we could see every page table walk, but not have to respond for every memory access. It seems like an interesting compromise. Together with a modified, light weight swapper, it could be close.
• An interesting thing to look at with DiskRAM is how compressible the total (useful) data on the machine is. It's possible that a large percentage of storage fits into RAM after simple RLE at the sector level.
• The same argument could be made with the working set of an application instead of the total contents of storage.